Pipelined or register-to-register operations.

Pipelined or register-to-register operations.

To reduce auto-correlation, the randomly varying bits are stored in a first shift register (30), the bits in the shift register being coupled to a second shift register (40).

By providing an accumulator register that is separate from the register file, data directed toward an accumulator register is diverted away from the register file and delays in performing write operations to the register file are reduced.

The activity log may further include an ascending log number.

The separating unit includes a separating shift register and a parallel register arranged downstream of said separating shift register.

If no register-to-register operations are implemented, continue with .

If an asynchronous register voter detects an inconsistent result, the asynchronous register voter clears itself.

A logic circuit is described, which comprises a first register, a second register and a third register, as well as a number of multiplication units.

The physical register number identifying the physical register is recorded for both the condition code register and the integer register.

The physical register number identifying the physical register is recorded for both the condition code register and the integer register.

A 16-bit map register (20, 120) determines the bank from which an addressed register (81, 118) is selected.

[if applicable] an extract from the [specify relevant company register] and [if applicable] [register of credit institutions or analogous register]

In this embodiment, the working register contains a high pad 4-bit register and a low pad 4-bit register.

The address register receives a signal indicating that an address is to be loaded into the address register.