A data processing system comprises a memory, a memory protection unit, and one or more IP units connected to the memory via the memory protection unit.
The memory protection system transmits m upper address defining a memory segment of the currently running application to the memory from a memory register.
Execution-Aware Memory protection technologies are described.
A memory protection device and a computer comprising the protection device are disclosed.
The printer further includes security features and memory protection.
This invention is provided with a memory protection unit for controlling access to a memory region from virtual computers.
A data processing system (2) includes memory protection circuitry (10) storing access control data for controlling accesses to data at memory addresses within a main memory (16).
Embodiments of the present invention provide an approach for memory protection at a level of granularity above a "page" level (e.g., enhancing the protection provided by a memory key-based system).
An integrated-circuit device (1) comprises a processor (7), memory (13) for storing executable code, and memory protection logic (9).
A method, system, and program key-controlled object-based memory protection are provided.
The region selection logic is operable to select a memory protection region that includes the address of a target memory access request from a system initiator (e.g., 122, 138).
In order to protect the operating system of a sensor node, coarse-grained memory protection is provided by creating and enforcing an application fault domain in the data memory address space of the sensor node.
The subject of the invention is a method of protecting a digital memory against permanent and transient errors and a related device.
A memory protection system in a multi-tasking system for preventing a currently running application from writing data to a memory segment storing data for a second application.
Said program-controlled unit is characterized in that it contains a memory protection device, which ensures that the contents of the memory, or a specific part of the latter can no longer be modified.
A memory protection unit (MPU) is integrated (1) between the at least one master unit and the network-on-chip bus system.
Requêtes fréquentes français :1-200, -1k, -2k, -3k, -4k, -5k, -7k, -10k, -20k, -40k, -100k, -200k, -500k, -1000k,
Requêtes fréquentes anglais :1-200, -1k, -2k, -3k, -4k, -5k, -7k, -10k, -20k, -40k, -100k, -200k, -500k, -1000k,
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