Each gating function has an associated controlling function for controlling the gating function.

A technique for controlling power gating in an integrated circuit is provided.

Each gateway node includes a gating function for gating media packets.

The memory hierarchy enables power gating of the unused banks to lower leakage power.

Utilization of the semi-insulating substrate may reduce back-gating effects in the MESFETs.

Based on the altitude information and a gating arrangement, velocity is determined.

A timing signal is received from the memory device at a gating circuit.

The receiver performs this function without the need for complicated optical gating circuitry.

The timing signal is passed through as a filtered timing signal during a gating window.

A main analog signal from a bioelectrical test probe and a gating signal are received.

A timing signal from the memory device is received at a gating circuit.

Circuitry for implementation of power gating within a multimedia processing environment is described.

A gating circuit connects selectively one or other of the conductors to the voltage source.

Methods and apparatus relating to fine grained power gating of camera image processing are described.

Embodiments of methods and apparatuses for gating impulse noise in a communication system are described.