The invention relates the executing of computer readable instructions on a hardware platform (301) comprising a reconfigurable hardware component (311), such as a field-programmable gate array (FPGA).
An apparatus comprising programmable logic devices including a field programmable gate array (FPGA) is presented.
The system evaluates parse-trees using a field programmable gate array (FPGA) chip (122).
A field programmable gate array (FPGA) having a plurality of configurable logic blocks (CLBs).
To configure the field programmable gate array, the encrypted configuration data is decrypted by the security circuit (64) of the field programmable gate array using the security key stored in the field programmable gate array.
A field programmable gate array (FPGA) circuit including a quadrature internal conditioning circuit is provided.
An FPGA is comprised of a number of cells which perform logical functions on input signals.
a microcontroller, in some versions; a microprocessor or field programmable gate array (FPGA), which processes the information and acts on the interface between the GPS;
Field programmable logic devices are also known as field programmable gate or field programmable logic arrays.
Use of these programmable gates in combination in an AND-OR array is illustrated.
The present invention relates to a method for protecting a programmable gate array design.
An architecture and distributed hierarchical interconnect scheme for field programmable gate arrays (FPGAs).
A field programmable gate array (FPGA) (10) matching the organization and performance of mask programmable gate arrays is presented.
Reconfigurable logic (402) such a field programmable gate arrays (FPGAs) can be used by the coprocessor for this hardware acceleration.
Providing for a field programmable gate array (FPGA) utilizing resistive random access memory (RRAM) technology is described herein.
The programmable gates control state, with a variety of operating modes you
An interconnection network architecture which provides an interconnection network which is especially useful for FPGAs is described.
The present invention is advantageous when implementing integrated circuits or field programmable gate arrays.
Xilinx (NASDAQ:XLNX) Xilinx makes field-programmable gate arrays (FPGAs), ideal for early 5G deployments and tests because they are easily programmable.
Another is field programmable gate arrays (FPGA) in the computing cloud, which enable “hardware microservices” – that’s extremely innovative.
Field programmable gate arrays can be used as a shared programmable co-processor resource in a general purpose computing system.
Embodiments utilize analog sub-threshold circuits to perform Boolean logic and soft-gate logic.
Moreover, only those FPGA logic gates or functions which are used are replicated in the gate array, to conserve chip area.
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