The polarization member (27) is composed of a wire grid polarization plate.

  A grid polarizing film composed of the optical member is also disclosed.

The nonlinear mode may be selected by applying a large gate offset bias.

Based on the comparing, a gate-bias voltage of at least one of the cascode transistors is changed.

So this grid, which is indeed a grid — it is often a wire mesh — acts as what is known as a “grid bias.

The present invention is directed to a self-adjusting gate bias network for field effect transistors in radio frequency applications.

A gate bias voltage, VBg, is connected to FET (108) through resistor (112) to FET (110).

So this grid, which is indeed a grid — it is often a wire mesh — acts as what is known as a “grid bias.

The at least one MOS transistor (320) is applied a variable gate bias voltage and a variable drain bias voltage in order to reduce variations of the power detection gain over temperature.

So this grid, which is indeed a grid — it is often a wire mesh — acts as what is known as a “grid bias.

The input and output stage of the amplifier use MOS-type FET, omitted the gate bias resistor.

The gate bias inputs can be biased equally and the drain bias inputs can be biased equally, resulting in a parallel, power combined, amplifier configuration.

A unique gate bias voltage for each transistor in the array is provided on a row-by-row basis via a voltage divider network.

Those are characterized by a conducting channel in the absence of polarization of grid (VGS = 0).

Those are characterized by a conducting channel in the absence of polarization of grid (VGS = 0).