The present application relates to an analogue-to-digital delta- sigma modulator (100) and to a method for analogue-to-digital delta-sigma modulation.
In order to restrict the bandwidth of the PLL, subsidiary analogue modulation is employed, which requires aligning with the delta-sigma modulation.
To further facilitate compactness, the MDBS includes a transceiver/modem board which uses a single chip to carry out delta-sigma modulation.
The signal amplification apparatus includes a correction circuit (104) for correcting output of quantization unit (103) of a delta-sigma modulation apparatus (10).
A digital DC-DC converter is implemented using first-order delta-sigma modulation, rather than A/D conversion .
Due to delta-sigma modulating being done through a feedback loop, the receivers (1,11) have become less critical.
Requêtes fréquentes français :1-200, -1k, -2k, -3k, -4k, -5k, -7k, -10k, -20k, -40k, -100k, -200k, -500k, -1000k,
Requêtes fréquentes anglais :1-200, -1k, -2k, -3k, -4k, -5k, -7k, -10k, -20k, -40k, -100k, -200k, -500k, -1000k,
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