This reduces external memory requirement for buffering the time-domain samples.

The central processing unit (220) may further include a memory (204) for storing the card numbers.

The buffers (204) may provide buffering for data lines (210) extending through the column of memory.

Moreover, systems and methods for caching of content addressed by identifiers intended to defeat cache are further disclosed.

In a method and system for storing a plurality of data blocks in a memory device (222), blocks of data elements are stored in a two-dimensional address space such that blocks overlap in the address space.

A software framework provides the ability to cache multiple plug-in's which are loaded in a processor's local storage.

A non-volatile cache including a non-volatile memory to cache data that is stored on a mass storage device.

The circuit is for multiplying a first packed data being stored at the first location with a second packed data being stored at the second location.

The fast path may cache only portions of the extent table as needed in accordance with a caching technique.

A direct sequence spread spectrum receiver samples an incoming signal and stores the sample in memory.

According to an exemplary embodiment, a cache system (20) includes a cache (22) operative to cache a plurality of data items.

The automated fiber optic connectorization apparatus includes a memory device for storing data relating to a plurality of types of connectors.

Each optimiser is for buffering incoming requests for the respective slave device.

The temporary storage portion (112) is provided for buffering data and addresses.

The invention relates to a method for operating a memory device for storing modifiable data (110',..., 118', 301,..., 305).