This method is applicable to manufacture of a semiconductor device having high integration density and high performance.

The invention is particularly useful for testing integrated circuits having a high integration density, e.g. in the field of nanotechnologies.

Three LSI chips are stacked, and a path over the three LSI chips is formed.

A method of manufacturing a semiconductor device of high packing density, which includes a simplified process but is capable of decreasing the fraction defective.

A method of manufacturing a semiconductor device of high packing density, which includes a simplified process but is capable of decreasing the fraction defective.

A variable wiring means is provided to programmably connect these circuit cell blocks together thereby to constitute an LSI for verification.

An encrypting/decrypting LSI incorporates an LSI key common to other devices, and a ROM holds a device key unique to the device.

Potential advantages are nonvolatility, increased data processing speed, decreased electric power consumption, and higher integration densities compared to conventional semiconductor devices.