Design, implementation and characterization of xor phase detector for dpll in 45 nm cmos technology... The CMOS XOR phase detector produces error pulses on both rising and falling edges while the CMOS phase frequency detector will respond only to positive or negative transitions....
Bipolar triangular wave current pulse inverter for shallow tem survey... The proposed inverter contains a high voltage source circuit for the rising edge and a Zener diodes circuit with constant voltage clamping for the falling edge....
Degradation of metal induced laterally crystallized n-type polysilicon tfts under dynamic gate voltage stresses... Device degradation occurs when the base voltage of gate pulses is lower than the flat-band voltage, and more degradation occurs with steeper falling edge and larger amplitude of the gate pulses....
Automatic control of clock duty cycleIn general, this disclosure is directed to a duty cycle correction (DCC) circuit that adjusts a falling edge of a clock signal to achieve a desired duty cycle....
