Traductions en contexte français - anglais

An interpolation processing execution unit (18) performs interpolation processing according to the interpolation function selected.

Further similarly, an interpolating line (B1234) for interpolating the portion between the interpolating points (P12, P34) is generated, and hence an interpolating point (P1234) is determined on the interpolating line (B1234).

An interpolation marker in the image is evaluated to provide interpolation results.

The interpolation unit (3) selects one of two types of interpolation, i.e., one-sided interpolation and two-sided interpolation, in accordance with the interpolation control signal (FS1), and generates interpolation pixel data (Pfp0).

The interpolation module can define any arbitrary relationship between animation variables.

An interpolation circuit capable of performing interpolation operation with a simple constitution.

The second interpolating unit uses a second interpolation algorithm to interpolate pixel values.

The interpolating method can be executed in the interpolating device.

The first interpolating unit uses a first interpolation algorithm to interpolate pixel values.

Hence interpolating points (P12, P34) are determined on the interpolating lines (B12, B34).

The allowable pressure profile is defined by interpolation points, the interpolation points being based on a probability function representing a family of pressure courses of a plurality of fluid transfer processes.

In an alternative embodiment, an interpolating function is constructed using prolate spheroidal wave functions (PSWFs) by adopting Gaussian quadrature points corresponding to a family of PSWFs as interpolation points.

An interpolator for enlarging or reducing a digital image includes an interpolation coefficient memory containing interpolation coefficients representing a one dimension interpolation kernel.

A numerical control apparatus which effects the interpolation control based on the spline interpolation function.

The present invention is an interpolation circuit that multiplexes inputs prior to one or more additions during the interpolation operation, thereby reducing the number of components implementing the interpolation circuit.