IEEE Institute of Electrical and Electronic Engineers

electrically erasable and programmable read only memory (EEPROM)

An electrically erasable writing surface is provided.

The secondary memory is electrically erasable in blocks.

Digital MOS integrated circuits (ICs) (E)EPROMS and flash EEPROMS

Each of the memory cells is an electrically erasable nonvolatile cell.

The key (17) includes a nonvolatile, electrically erasable programmable memory chip (71).

The third portion of the memory comprises an electrically erasable and electrically programmable read-only memory (EEPROM) (115c).

An electrically programmable and erasable memory (EEPROM) (13a, 13b) is associated to each microprocessor (10a, 10b).

A flash electrically erasable programmable read only memory (EEPROM) cell fabricated in a semiconductor substrate.

The outputs of the inverting buffers (12,400) serve as the electrically erasable programmable logic array (10,000) output terminals.

To reduce the power consumption of the chip card of a mobile telephone according to the power supply status of the said telephone, the electrically erasable memory is managed according to the power supply status of the mobile device.

Various portions of EEPLAS (10,000) are illustrated in Figs. 3, 4, and 9.

Electrically-Erasable Programmable Read-Only Memory.

The optimum attenuator setting is stored in an EEPROM (62) for each drive frequency.