The complex programmable logic device (1110) controls data access to and from each device that is coupled to the common control bus (530).

A very high-density complex programmable logic device (CPLD) has a plurality of hierarchical signal paths.

The complex programmable logic device (1110) is capable of selectively coupling to the common control bus (530) each one of a plurality of device locations on the circuit board card (800).

The present invention comprises a complex programmable logic device (1110) on a circuit board card (800) that is coupled to a common control bus (530).

A hierarchical switch matrix in a very high-density programmable logic device (CPLD) interconnects a multiplicity of programmable logic blocks (101) in the CPLD.

The data storage part comprises a nonvolatile data memory (1), an address latch (2), a Single Chip Micyoco (3) and the Complex Programmable Logic Device (4) in bidirectional connection.