The problem is usually addressed by the calculation of the maximum likelihood, ML, state sequence by means of a Viterbi or other decoder.

Each first decoder (44) preferably comprises a reduced complexity Viterbi decoder (44) responsive to a partial representation of the state of the linear filter (42).

A decoder (405) for detecting data within an input signal with attenuated low frequency components that comprises a Viterbi decoder (402), is disclosed.

A satellite signal receiver (12) includes an input demodulator (7) followed by a Viterbi decoder (26) and a Reed-Solomon decoder (28).

The invention relates to a Viterbi equalizer for equalizing a data signal, which has been transmitted via a disturbed channel.

Thus, it is possible to successively and appropriately correct reference values used in the Viterbi decoder.

The complexity of the Viterbi decoder (22) depends on the number of quantization levels at the output of the quantization means (20).

A viterbi decoder adapted to various constraint lengths and the number of coefficients of a given estimated transmission line and composed of special hardware of small circuit scale.

A Viterbi decoder (40) is used to reconstruct from the received signal an estimate of a data bit that was coded for transmission.

Hence, in a list output Viterbi decoder, the second ACS recursion can be limited to sections of the data blocks.

An encoded stream of input symbols are input to the viterbi decoder and written to the memory block structure one word at a time.

These control signals are sensed by a control network to change the code rate of the Viterbi decoder if necessary.

Thus the number of elements is greatly decreased and a small-sized high-speed Viterbi decoder is realized.

The stage reduction unit (80) uses the additional information to limit the decoding by the Viterbi decoder (81) to certain subsequent stages.

Each group of received symbols may also be directly applied to a respective second Viterbi decoder (46) for estimating data bits X1 X2.