The virtual path includes at least a virtual peripheral bus controller and a virtual video controller.

In particular, the video controller provides information needed by the video frame encoder to encode the current frame in the video sequence.

A computer includes a processor (310), a video controller (382) having a video output, a bus connected between the processor and the video controller and a communication device (396) connected to the bus.

An operating system, utilizing the processor, directs the operation of the video controller.

The computer system includes a video display controller (VDC) with a graphics generator.

The video controller can then respond appropriately, e.g., by requesting the video frame encoder to encode the next frame in the video sequence.

The first video controller continues to monitor the first video signal until the absence of the luminance component is detected.

The host computer may serialize the compressed data and store the data in serialized compressed format in a video memory of a video controller.

Uses the NVIDIA video controller to provide faster performance.

Underlying the CPCs video output was the Motorola 6845 address generator.

Video timing on the CGA is provided by the Motorola 6845 video controller.

The VDC includes a power saving controller implementing one of several available power saving modes dependent upon one or more of several possible inputs.

The video controller may programmably operate in either an RGB or non-RGB mode.

A video controller in the subsystem performs the higher-level functions of coordinating the encoding of the video stream, thereby allowing the video frame encoder to limit its processing to the lower, frame level.

Video Control = The task of video controller is the same as the gatekeepers.