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Design and performance of compressed interconnects for high performance servers... Furthermore, in a multiprocessor configuration, the width of the shared interconnect can pose a significant hurdle in terms of design complexity, cost, and achievable interconnect frequency....
général - core.ac.uk - PDF: citeseerx.ist.psu.edu
Towards efficient parallel radiosity for dsm-based parallel computers using virtual interfaces... Our technique decreases the execution time on one processor of an SGI Origin 2000 by a factor of more than 5 and leads to a very good efficiency for complex environments (1 million of polygons) on a multiprocessor configuration
 PDF: core.ac.uk
Towards efficient parallel . . . using virtual interfaces... Our technique decreases the execution time on one processor of an SGI Origin 2000 by a factor of more than 5 and leads to avery good efficiency for complex environments (1 million of polygons) on a multiprocessor configuration
Detailed design of the kernel of a real-time multiprocessor operating system.... In a multiprocessor configuration, this physical distribution minimizes system bus contention and lays the foundation for dynamic reconfiguration....
Power and performance optimization at the system level... To exploit thread level parallelism, the BlueGene/L system can scale to 64 racks with a total of 65536 computer nodes consisting of a single compute ASIC integrating all system functions with two industry-standard PowerPC microprocessor cores in a chip multiprocessor configuration....

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