A switch for switching packets.

The output-buffered packet switch can be used to implement a centralized control for another packet switch of higher speed but same functionality.

The packet-processing device then communicates the clear data back to the packet switch for continued processing (630).

A method and system for byte slice processing of received data packets at a packet switch is provided.

An output-buffered packet switch with priority packet transmission and a flexible buffer management scheme is disclosed.

Client access to each of the servers is through one of the internal packet switches and the external packet switch.

The serial path is coupled at one end to a packet switch (14).

In contrast to the stream-oriented switch, the packet switch has much smaller overall throughput, but requires much less time for reconfiguration.

The first plurality of cores and the packet switch are on an integrated circuit.

The packet switch directs both requests for data and the data between processing devices.

The invention relates to the identification of data packets in switching equipment (2) included in a telecommunication system (1) and known as a packet switch.

A method and system for internal data loop back in a packet switch is provided.

A data packet switch using a multichannel bus architecture for allowing simultaneous data transfer among network segments connected to the switch.

Embodiments of the invention are directed to multicasting packets in a system such as a data packet switch or router having a distributed architecture.

A system for controlling the flow of data cells through a packet switch combines both input and output buffers in a feedback loop.