To permit particularly easy and reliable determination of the latter, the evaluation circuit is a counting circuit which counts the number of oscillations whose amplitude exceeds a predetermined value (4, 5).
The present invention relates to a counter circuit and method of controlling such a counter circuit, wherein a first counting section counts in accordance witha state- cycle, and a second counting section is clocked by the first counting section.
When the counter value of the counter circuit (204) has reached a predetermined value, the notification unit (206) notifies that the counter value of the counter circuit (204) has reached the predetermined value.
The pulse is counted by a counter circuit (16).
A counter circuit (32) provides counter output data based on the counter initialization data.
The analog/digital converter includes an oscillation circuit(401) and a counter circuit(402).
The counter circuit(402) performs subtraction during the reset operation of the photo sensor.
The comparator circuit, as a result of the interruption event, causes a high frequency counter circuit (44-46) to count clock pulses.
A detection circuit (200) comprises an input unit (202), a counter circuit (204), and a notification unit (206).
The counter circuit is also reset to zero in preparation for the next interruption event.
When the input unit (202) acquires the communication data, a reset signal generated from the communication data is input to the counter circuit (204) to reset the counter circuit (204).
A counter circuit counts clock cycles and provides an index into the look up table.
The momentary state of the counter circuit corresponds to an instantaneous phase value of the electrical input signal.
A timing circuit that can function as an accurate persistent node in an RFID tag includes a power capture circuit for capturing power from a power source, and a counter circuit that provides a count representing a progression of time.
An output register is provided for storing the corrected resulting numerical value of the counter circuit.
This timer circuit is wired as an astable multivibrator to display a seven segment counter with the help of the counter IC CD 4033.
An intermediate register stores a momentary state of the counter circuit in response to receiving the trigger pulse.
The second counter circuit (N3) and the timing signal generating circuit (N4) execute substantially fixed operations for the address data that takes any position.
The count in the (clock) counter circuit is continuously applied to an RAM memory circuit (51-55), write-enabled at an addressed memory location.
A comparator circuit (22) continuously monitors the solenoid current and initiates a timer within a counter circuit (34) to compute the first current decay time.
A counter circuit counts the pulses contained in the clock edge recovery output signal.
A counter circuit (41) of a frequency signal generating circuit (4) repeatedly generates a frequency signal of which the amplitude is varied in a multi-step shape on the basis of an oscillation period of an oscillation circuit (40).
Requêtes fréquentes français :1-200, -1k, -2k, -3k, -4k, -5k, -7k, -10k, -20k, -40k, -100k, -200k, -500k, -1000k,
Requêtes fréquentes anglais :1-200, -1k, -2k, -3k, -4k, -5k, -7k, -10k, -20k, -40k, -100k, -200k, -500k, -1000k,
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