A connection is provided between the main cache memory and each auxiliary cache memory for transferring the contents from mark fields in the main cache memory to each auxiliary cache memory and vice versa.
The interruption of the signal (SMIACT#) that represents the switching of the mode by secondary cache is provided.
The data replicating method includes updating a primary cache, followed by updating the secondary cache.
The main cache memory and each auxiliary cache memory can be indexed with identical or different addresses on the main cache memory in order to carry out operation orders.
The system further comprises at least one auxiliary cache memory with a plurality of entries, each of which comprises one mark field per mark field of a main cache memory entry.
Requêtes fréquentes français :1-200, -1k, -2k, -3k, -4k, -5k, -7k, -10k, -20k, -40k, -100k, -200k, -500k, -1000k,
Requêtes fréquentes anglais :1-200, -1k, -2k, -3k, -4k, -5k, -7k, -10k, -20k, -40k, -100k, -200k, -500k, -1000k,
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