A lower back bias or no back bias is applied during verify of a final state (e.g., an upper page).

Thus, a different back bias may be used when verifying an intermediate state than the back bias used when verifying a final state.

Using the back bias makes it easier to verify a low VTH, such as a negative VTH.

Also, using the back bias is effective at dealing with sense amplifier headroom issues.

Different back bias (or body bias) conditions are applied to a non-volatile storage system during different program verify operations of a programming operation.

A back bias may be applied during verify of an intermediate state (e.g., a lower page, middle page).

Namely, on the surface having the base substrate (12) bonded thereon, the transparent electrode (14) is formed as an electrode for performing polarization inversion of the ferroelectric single crystal substrate (11').

Biasing the substrate may improve boosting of channels of unselected NAND strings, which may reduce program disturb.

Therefore, the output of the low voltage regulator will maintain a normal operating voltage for the logic during a power saving back-biased condition.

The output voltage generated by the substrate bias generator is detected and if it is too low a voltage, the booted mode is turned off.

A MOSFET increased in substrate bias effect Ϝ without an increase in parasitic capacitance and junction leak current.

The voltage regulator (20) provides a pump enable signal for maintaining a voltage level of the substrate bias within upper and lower limits.

A system for plasma processing using electron-free ion-ion plasmas, wherein the substrate (14) bias waveform is synched to a pulsed RF drive.

A low-power auxiliary pump generator (92) provides a sufficient substrate bias to maintain the data pattern in the memory cell array (50) during the backup mode.

Disclosed is a semiconductor device using a vertical MOS transistor wherein source parasitic resistance and a back-bias effect can be ignored.